aports/testing/a2jmidid/riscv.patch
2021-07-11 20:18:33 +02:00

12 lines
929 B
Diff

diff -upr a2jmidid-9.orig/sigsegv.c a2jmidid-9/sigsegv.c
--- a2jmidid-9.orig/sigsegv.c 2021-07-11 11:43:22.326350510 +0200
+++ a2jmidid-9/sigsegv.c 2021-07-11 11:43:34.907756185 +0200
@@ -91,7 +91,7 @@ static void signal_segv(int signum, sigi
a2j_error("info.si_errno = %d", info->si_errno);
a2j_error("info.si_code = %d (%s)", info->si_code, si_codes[info->si_code]);
a2j_error("info.si_addr = %p", info->si_addr);
-#if !defined(__alpha__) && !defined(__ia64__) && !defined(__FreeBSD_kernel__) && !defined(__arm__) && !defined(__hppa__) && !defined(__sh__) && !defined(__aarch64__)
+#if !defined(__alpha__) && !defined(__ia64__) && !defined(__FreeBSD_kernel__) && !defined(__arm__) && !defined(__hppa__) && !defined(__sh__) && !defined(__aarch64__) && !defined(__riscv)
for(i = 0; i < NGREG; i++)
a2j_error("reg[%02d] = 0x" REGFORMAT, i,
#if defined(__powerpc__) && !defined(__powerpc64__)